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 PD - 94947A
IRLML6302PBF
l l l l l l l l
Generation V Technology Ultra Low On-Resistance P-Channel MOSFET SOT-23 Footprint Low Profile (<1.1mm) Available in Tape and Reel Fast Switching Lead-Free
HEXFET(R) Power MOSFET
D
VDSS = -20V
G S
RDS(on) = 0.60
Description
Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. A customized leadframe has been incorporated into the standard SOT-23 package to produce a HEXFET Power MOSFET with the industry's smallest footprint. This package, dubbed the Micro3, is ideal for applications where printed circuit board space is at a premium. The low profile (<1.1mm) of the Micro3 allows it to fit easily into extremely thin application environments such as portable electronics and PCMCIA cards.
Micro3
Absolute Maximum Ratings
Parameter
I D @ TA = 25C I D @ TA = 70C IDM PD @TA = 25C VGS dv/dt TJ, TSTG Continuous Drain Current, VGS @ -4.5V Continuous Drain Current, VGS @ -4.5V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt Junction and Storage Temperature Range
Max.
-0.78 -0.62 -4.9 540 4.3 12 -5.0 -55 to + 150
Units
A mW
mW/C
V V/ns C
Thermal Resistance
RJA Maximum Junction-to-Ambient
Parameter
Typ.
Max.
230
Units
C/W
08/25/05
IRLML6302PBF
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
Parameter Drain-to-Source Breakdown Voltage V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient V(BR)DSS RDS(ON) VGS(th) g fs IDSS I GSS Qg Q gs Qgd td(on) tr td(off) tf Ciss Coss Crss Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Min. -20 -0.70 0.56 Typ. -4.9 2.4 0.56 1.0 13 18 22 22 97 53 28 Max. Units Conditions V VGS = 0V, ID = -250A mV/C Reference to 25C, ID = -1mA 0.60 VGS = -4.5V, ID = -0.61A 0.90 VGS = -2.7V, ID = -0.31A -1.5 V VDS = VGS, ID = -250A S VDS = -10V, ID = -0.31A -1.0 VDS = -16V, VGS = 0V A -25 VDS = -16V, VGS = 0V, TJ = 125C -100 VGS = -12V nA 100 VGS = 12V 3.6 ID = -0.61A 0.84 nC VDS = -16V 1.5 VGS = -4.5V, See Fig. 6 and 9 VDD = -10V ID = -0.61A ns RG = 6.2 RD = 16, See Fig. 10 VGS = 0V pF VDS = -15V = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
IS
I SM
VSD t rr Q rr
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge
Min. Typ. Max. Units -0.54 35 26 -4.9 -1.2 53 39 V ns nC A
Conditions MOSFET symbol showing the G integral reverse p-n junction diode. TJ = 25C, IS = -0.61A, VGS = 0V TJ = 25C, IF = -0.61A di/dt = 100A/s
D
S
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Pulse width 300s; duty cycle 2%. Surface mounted on FR-4 board, t 5sec.
ISD -0.61A, di/dt 76A/s, VDD V(BR)DSS,
TJ 150C
IRLML6302PBF
10
VGS - 7.5V - 5.0V - 4.0V - 3.5V - 3.0V - 2.5V - 2.0V BOTTOM - 1.5V TOP
10
-I D , Drain-to-Source Current (A)
-ID , Drain-to-Source Current (A)
VGS - 7.5V - 5.0V - 4.0V - 3.5V - 3.0V - 2.5V - 2.0V BOTTOM - 1.5V TOP
1
1
0.1
0.1
-1.5V 20s PULSE WIDTH TJ = 150C
0.1 1 10
0.01 0.1
-1.5V
1
20s PULSE WIDTH TJ = 25C A
10
0.01
A
-VDS , Drain-to-Source Voltage (V)
-V , Drain-to-Source Voltage (V) DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
10
2.0
-ID , Drain-to-Source Current (A)
TJ = 25C TJ = 150C
R DS(on) , Drain-to-Source On Resistance (Normalized)
I D = -0.61A
1.5
1
1.0
0.1
0.5
0.01 1.5 2.0 2.5 3.0
VDS = -10V 20s PULSE WIDTH
3.5 4.0 4.5
A
0.0 -60 -40 -20 0 20 40 60 80
V GS = -4.5V
100 120 140 160
A
-VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature (C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
IRLML6302PBF
180 160 140
-V GS , Gate-to-Source Voltage (V)
Ciss
V GS = 0V, f = 1MHz C iss = Cgs + C gd , Cds SHORTED C rss = C gd C oss = C ds + C gd
10
I D = -0.61A VDS = -16V
8
C, Capacitance (pF)
120 100 80 60 40 20 0 1
Coss
6
Crss
4
2
10
100
A
0 0.0
FOR TEST CIRCUIT SEE FIGURE 9
1.0 2.0 3.0
4.0
A
-VDS , Drain-to-Source Voltage (V)
Q G , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
10
10
-ISD , Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED BY R DS(on)
-I D , Drain Current (A)
1
100s
TJ = 150C TJ = 25C
0.1
1 1ms
10ms
0.01 0.4 0.6 0.8 1.0
VGS = 0V
1.2
A
1.4
0.1 1
TA = 25C TJ = 150C Single Pulse
10
100
A
-VSD , Source-to-Drain Voltage (V)
-VDS , Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
IRLML6302PBF
QG
V DS VGS RG
RD
-4.5V
VG
-4.5V
Charge
Pulse Width 1 s Duty Factor 0.1 %
Fig 9a. Basic Gate Charge Waveform
Current Regulator Same Type as D.U.T.
Fig 10a. Switching Time Test Circuit
VDS
50K 12V .2F .3F
90%
VGS
-3mA
IG
ID
Current Sampling Resistors
Fig 9b. Gate Charge Test Circuit
1000
Thermal Response (Z thJA )
100
D = 0.50 0.20 0.10
10
0.05 0.02 0.01 PDM SINGLE PULSE (THERMAL RESPONSE) t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJA + TA 0.0001 0.001 0.01 0.1 1 10 100
1
0.1 0.00001
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
+
D.U.T.
VDS
10% VGS
td(on) tr t d(off) tf
Fig 10b. Switching Time Waveforms
t1 , Rectangular Pulse Duration (sec)
+
-
QGS
QGD
D.U.T. VDD
-
IRLML6302PBF
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG VGS*
**
* dv/dt controlled by RG * I SD controlled by Duty Factor "D" * D.U.T. - Device Under Test
+ -
VDD
*
* Reverse Polarity for P-Channel ** Use P-Channel Driver for P-Channel Measurements
Driver Gate Drive P.W. Period D= P.W. Period
[VGS=10V ] ***
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
[VDD]
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
[ISD]
*** VGS = 5.0V for Logic Level and 3V Drive Devices Fig 13. For P-Channel HEXFETS
IRLML6302PBF
Micro3 (SOT-23) (Lead-Free) Package Outline
Dimensions are shown in millimeters (inches)
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Micro3 (SOT-23 / TO-236AB) Part Marking Information
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IRLML6302PBF
Micro3TM Tape & Reel Information
Dimensions are shown in millimeters (inches)
2.05 ( .080 ) 1.95 ( .077 ) 4.1 ( .161 ) 3.9 ( .154 ) 1.6 ( .062 ) 1.5 ( .060 )
1.85 ( .072 ) 1.65 ( .065 )
1.32 ( .051 ) 1.12 ( .045 )
TR
3.55 ( .139 ) 3.45 ( .136 )
8.3 ( .326 ) 7.9 ( .312 )
FEED DIRECTION
4.1 ( .161 ) 3.9 ( .154 )
1.1 ( .043 ) 0.9 ( .036 )
0.35 ( .013 ) 0.25 ( .010 )
178.00 ( 7.008 ) MAX.
9.90 ( .390 ) 8.40 ( .331 ) NOTES: 1. CONTROLLING DIMENSION : MILLIMETER. 2. OUTLINE CONFORMS TO EIA-481 & EIA-541.
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 08/05


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